Input and Output Capacitor Selection for Switching Regulators

When designing with switching regulators, application requirements determine how
much input an output capacitance is needed. There are a number of key concerns
which effect your selection.

https://www.ti.com/lit/an/slta055/slta055.pdf?ts=1758874257057

1. How to Select LDO Input Capacitors:

https://www.allpcb.com/ar-SA/allelectrohub/how-to-select-ldo-input-capacitors

2. Noise Sources in Low Dropout (LDO) Regulators 

https://www.analog.com/en/resources/app-notes/an-1120.html

3. How to select Input capacitor for low drop-out (LDO) regulator:

https://community.infineon.com/t5/Knowledge-Base-Articles/How-to-select-Input-capacitor-for-low-drop-out-LDO-regulator/ta-p/840041#. 

 

 

 

 

Sleep Modes and Power Management

 

Idle: light sleep. You may need to switch off other components directly via PRR (coming later) so that the ATmega328P does not wake up unintentionally.

ADC Noise Reduction: Even in this mode, many functions remain active. The ADC Noise Reduction Mode, as the name suggests, is also used to reduce noise in analog digital conversions. This allows a higher resolution to be achieved.

Power-down: the most energy-saving deep sleep. Only external interrupts, TWI (Two Wire Interface – > I2C) or the watchdog interrupt can wake up the ATmega328P.

Power-save: is similar to the power-down mode, but the Timer2 is still awake and could be operated via an external clock.

Stand-by: the system oscillator is still running here. This mode is typically chosen when quick waking is necessary. Only six cycles are needed. It is important to know that an external quartz oscillator needs time in the millisecond range to provide a stable system clock.

Extended Standby: Compared to the stand-by mode, the Timer2 is active

Nguồn: https://wolles-elektronikkiste.de/en/sleep-modes-and-power-management